Field of the Invention
The present invention relates to the field of power electronics. It relates to a turn-off power semiconductor component comprising
(a) a planar semiconductor substrate having two oppositely situated principal surfaces, of which the first is designed as anode and the second as cathode; PA1 (b) in the semiconductor substrate between the anode and the cathode, a laterally continuous, n.sup.- -doped n-type base layer, a p.sup.+ -doped anode layer which is embedded in the n-type base layer from the anode side and is provided with an anode contact on the first principal surface, and a p.sup.+ -doped p-type base layer which is embedded in the n-type base layer from the cathode side; PA1 (c) a multiplicity of unit cells arranged alongside to one another and electrically connected in parallel in the semiconductor substrate between the anode and the cathode; and PA1 (d) a first MOSFET, which is provided for the purpose of turning off the component, arranged inside each unit cell on the cathode side. PA1 (e) an n.sup.+ -doped turn-off region is embedded in the p-type base layer, a p-type short-circuit region which is p.sup.+ -doped is embedded in its turn in the turn-off region, and an n.sup.+ -doped first cathode region is embedded in its turn in the p-type short-circuit region, all from the cathode side, the p-type short-circuit region and the first cathode region being provided with a cathode contact on the second principal surface; PA1 (f) an n.sup.++ -doped second cathode region which adjoins the turn-off region is embedded in the p-type base layer on one side of the turn-off region from the cathode side; PA1 (g) first gate electrode and a second gate electrode are arranged alongside one another and in an insulated manner above the semiconductor substrate on the cathode side and are isolated from one another by a first window, PA1 (h) the p-type short-circuit region and the turn-off region have been introduced into the semiconductor substrate through the first window. PA1 (a) first introducing the p-type base layer into an n.sup.- -doped semiconductor substrate forming the n-type base layer from the second principal surface; PA1 (b) then coating the entire area of the second principal surface of the semiconductor substrate with a gate electrode layer having an insulated structure; PA1 (c) then opening the first windows in the gate electrode layer, which windows isolate the first and second gate electrodes from one another in the gate electrode layer; and PA1 (d) finally, successively embedding the turn-off regions and the p-type short-circuit regions in the underlying p-type base layer through the first windows. PA1 (a) the various regions and gate electrodes are arranged in each case in mirror-image fashion in adjacent unit cells; PA1 (b) the second gate electrodes of every two adjacent unit cells are combined to form a common second gate electrode; PA1 (c) the p-type base layer and the n-type base layer are brought to the second principal surface between the second cathode regions of two adjacent unit cells; PA1 (d) an insulated third gate electrode is arranged above the parts of the p-type base layer and the n-type base layer emerging at the second principal surface, which gate electrode is in each case isolated from the adjacent first gate electrodes by a second window, through which second window the second cathode region has in each case been introduced into the semiconductor substrate; PA1 (e) the second cathode region, the p-type base layer, the n-type base layer and the third gate electrode form a third MOSFET which produces a switchable connection between the n-type base layer and the turn-off region and serves to turn on the component.
Such a component is disclosed, for example, in a paper by V. A. K. Temple, IEEE Transactions on Electron Devices, Vol. ED-33, No. 10, October 1986, pages 1609-1618 as an MOS-controlled thyristor (MCT).
The invention furthermore relates to a process for producing such a component.